1. Field of the Invention
The present invention relates to a liquid crystal pixel memory, a liquid crystal display, and methods of driving the liquid crystal pixel memory and the liquid crystal display, wherein a liquid crystal drive voltage, the polarity of which is cyclically reversed in order to control the alignment state of liquid crystal molecules, is applied to a liquid crystal layer.
2. Description of the Related Art
An active matrix liquid crystal display, for example, is used in OA apparatuses or other various apparatuses as a display device for displaying information such as characters and graphics. This liquid crystal display is a display panel that has, in usual cases, such a structure that a liquid crystal layer is held between a pair of substrates. In this display panel, a plurality of pixels are arrayed in a matrix, thereby forming a display screen. Each pixel is driven via a thin film transistor (TFT).
In a conventional active matrix liquid crystal display, a plurality of pixels are driven by, in usual cases, a line-at-a-time driving method. In the line-at-a-time driving method, a plurality of pixels are successively selected in units of rows that form a single horizontal line. A video signal for a single horizontal line is supplied to the pixels of the selected row. Each pixel has a pixel capacitance that is charged and discharged by the associated video signal. This pixel capacitance includes a liquid crystal capacitance, which is obtained between a pair of electrodes that apply a voltage of the video signal to the liquid crystal layer as a liquid crystal drive voltage, and a storage capacitance that is connected in parallel to this liquid crystal capacitance. The alignment of liquid crystal molecules is controlled by an electric field that is created between the pair of electrodes according to the liquid crystal drive voltage. The liquid crystal drive voltage varies in cycles of one frame period, which is a refresh period of the video signal.
If the alignment state of liquid crystal molecules is continuously controlled by a unidirectional electric field, non-uniform distribution of liquid crystal molecules occurs in the liquid crystal layer. The non-uniform distribution makes the liquid crystal display inoperable, so the polarity of the liquid crystal drive voltage needs to be reversed in cycles of, e.g. one frame period. Further, in a case where dot-reversal driving is executed in order to suppress flicker, the alignment state of liquid crystal molecules is controlled by liquid crystal drive voltages of polarities that are opposite between adjacent pixels. In this case, a video signal for one horizontal line is supplied to the pixels of the selected row via a plurality of signal lines, with the polarity of the video signal being reversed in cycles of each horizontal scan period. Specifically, a signal line driver LSI drives a plurality of video signal lines in accordance with the video signal for one horizontal line. Since parasitic wiring capacitances on the signal lines are charged/discharged by the polarity that is reversed by the driver LSI in cycles of one horizontal scan period, the power consumption of the driver LSI is very large. The power consumption P of the driver LSI is approximately given byP=CL·fF·NS·VSIG2where CL is the total wiring capacitance of the signal lines, fF is the frame frequency, NS is the number of scan lines, and VSIG is a maximum amplitude (Peak-to-Peak value) of the video signal. If the size and resolution of the display panel of the liquid crystal display are increased, both the wiring capacitance for a video signal and the clock frequency of the drive circuit will increase. It is thus understood that the power consumption of the signal line driver LSI will rise at an increasing rate. As a measure to solve this problem, first prior art is proposed (see, e.g. Jpn. Pat. Appln. KOKAI Publication No. 9-258168 and Jpn. Pat. Appln. KOKAI Publication No. 9-274200). According to the first prior art, an increase in power consumption is suppressed, for example, by providing a memory element of an SRAM structure in each pixel circuit and thinning out the video signal on a frame-by-frame basis.
Further, in the active matrix liquid crystal display, how to increase the image quality is also a technical problem to be solved. As regards this problem, a liquid crystal display with an in-plane switching scheme is proposed as second prior art (see, e.g. Jpn. Pat. Appln. KOKAI Publication No. 07-036058, Jpn. Pat. Appln. KOKAI Publication No. 2003-149664 and Jpn. Pat. Appln. KOKAI Publication No. 2003-15155). In the liquid crystal display with an in-plane switching scheme, a pair of pixel electrodes are provided in each of the pixel areas of one of the substrates, and a lateral electric field, which is substantially parallel to the plane of the electrode, that is, the surface of the substrate, is created in the liquid crystal layer. Thereby, liquid crystal molecules are rotated in the plane to effect a multi-gradation display. Hence, a high contrast ratio and high color reproducibility can be realized within a wider field of view.
In the first prior art, the memory elements in the pixel circuits are digital memories. Thus, in order to perform an ordinary multi-gradation display, it is necessary to provide memory elements in number corresponding to the number of gradations for display, and signal lines for supplying signals to the memory elements. For example, in order to enable a display in 64 gradations, it is necessary to provide memory elements for six bits, as well as six signal lines, within the pixel area of each of all the pixels. If such a number of elements and lines are actually provided within the limited pixel area, the aperture ratio and manufacturing yield will deteriorate. Thus, it is difficult to present a low-power-consumption, high-image-quality liquid crystal display at low cost.
In the second prior art, the image quality of the liquid crystal display can be enhanced, but no consideration is given to the problem of power consumption of the signal line driver LSI. Each pixel is configured to directly supply a video signal coming from a signal line driven by the driver LSI and sampled by a sampling transistor to the liquid crystal layer as a liquid crystal drive voltage. In this configuration, an increase in power consumption of the signal line driver LSI cannot be suppressed.